1. Field of the Invention
The present invention relates to communications devices, and particularly to interfacing at least two integrated circuits of a communications device.
2. Description of the Related Art
In a communications network, network devices receive data at one of a set of input interfaces and forward the data to one or more of a set of output interfaces. Users typically require that such network devices operate as quickly as possible in order to maintain a high data rate. Switches, one type of network device, are typically data link layer devices that enable multiple physical networks (e.g., local area network (LAN) or wide area network (WAN) segments) to be interconnected into a single-larger network. In the most general sense, these types of networks transport data in the form of packets. A packet is a logical grouping of information sent as a data unit over a transmission medium. Packets typically include header and/or trailer information used, for example, for routing, synchronization, and error control. The header and/or trailer information surrounds payload data contained in the packet. The terns cell, datagram, message, frame, and segment are also used to describe logical information groupings at various layers of the Reference Model for Open Systems Interconnection (OSI reference model). As used herein, the term “packet” should be understood in its broadest sense, and can encompass other terms including cell, datagram, message, frame, and segment, and the like.
One factor on which the data rate of a network device (e.g., a switch) depends is the board-level system interconnect interface of the network device. The board-level system interconnect interface is the interface by which board level devices such as application specific integrated circuits (ASICs), network processing chips (NPUs), packet processing engines, queuing devices, fabric devices, and other board level devices directly communicate with each other. Devices coupled with a board-level system interconnect interface can be on the same board, or on different boards. With a poorly designed board-level system interface, a network device may be unable to efficiently transfer packets at a high data rate through the network device. This can adversely impact the over all data rate of the network device.
One commonly-utilized board-level interface is the SPI-4.2 system packet interface described by the Optical Internetworking Forum in “System Packet Interface Level 4 (SPI-4) Phase 2: OC-192 System Interface for Physical and Link Layer Devices, Optical Internetworking Forum Implementation Agreement, January 2001” (the “SPI-4.2 interface specification”). The SPI-4.2 interface is a system packet interface for OC192 physical and link layer devices designed to provide a data rate of approximately 10 Gbps between devices. However, while commonly implemented, the SPI-4.2 is not without limitations. For example, the SPI-4.2 interface does not provide a practical solution for many network device configurations which desire to operate at data rates substantially higher than 10 Gpbs. Accordingly, it is desirable to have an interface similar to the SPI-4.2 interface, but yet provides a data rate higher than currently available with the SPI-4.2 interface.